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Article summary:
1. Discrete Silicon Carbide (SiC) MOSFETs are usually used in parallel to increase current capacity, but the rough design of the busbar structure can lead to an asymmetric parasitic inductance and current imbalance.
2. This paper proposes a decoupling method to acquire the equivalent inductance that can easily evaluate the current balance performance and provide a basis for the busbar structure design.
3. The proposed decoupling method is verified by simulation and experimental tests with a specific laminated busbar with six devices in parallel in each bridge arm for an electrical vehicle inverter as a case study.
Article analysis:
The article provides a detailed overview of the method for decoupling the parasitic inductance of the laminated busbar with SiC MOSFETs in parallel, which is useful for medium and high-power applications. The authors present their research findings clearly, providing evidence from simulations and experiments to support their claims. The article also includes references to other relevant studies, which adds credibility to their work.
However, there are some potential biases that should be noted when evaluating this article. For example, it does not explore any counterarguments or alternative solutions to the problem presented, nor does it discuss any possible risks associated with using this method. Additionally, while it does provide references to other relevant studies, these references are limited in scope and do not cover all aspects of the topic discussed in detail. Furthermore, some of the claims made by the authors may be unsupported or incompletely supported by evidence provided in the article itself or from external sources.
In conclusion, while this article provides useful information on decoupling parasitic inductance of laminated busbars with SiC MOSFETs in parallel, there are some potential biases that should be taken into consideration when evaluating its trustworthiness and reliability.